PSO Implementation Strategy Verification using SVA

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Power Shut OFF is a low power strategy which cuts off leakage current over a period of time. PSO intent is captured and intimated to the Design compiler tool using Unified Power Format File (UPF) .

UPF file captures the power intent of the RTL in a separate format.

PSO implementation includes the following strategy that are attached to the design in the later implementation phases :
1. Creation of Power Domain (PD)
2. Isolation Strategy
3. Retention Strategy
4. Power switch

Let us dive further into this topic with a simple example. 
Consider a Design unit as shown in the figure. This system consists of a simple Design top with Block A as shown below.
RTL DESIGN TOP 
Let us start building a UPF for this DESIGN TOP.
Let the Design TOP be PD1 (Default Power Domain or always ON PD) and let Block_A be PD2.
Power controller management mechanism is present in PD1 domain.
PD2 is a switchable power domain which needs isolation from PD1 and retention strategy to save previous data before power shut off.
PSO sequence applied for PD2, to enter into shut off is available is shown below. 
PSO SEQUENCE 

After applying the power intent, the design top is shown below
DESIGN BEHAVIOUR WITH POWER INTENT 
Strategies that can be verified by SVA:
1. During the entire Isolation application, the outputs of PD2 should remain stable
2. During the entire Isolation application, the outputs of PD2 should remain in a corresponding value that is defined in UPF isolation strategy
3. During the entire Isolation application, the outputs of PD2 should not propagate 'x' into PD1
4. Data that is saved during retention should be properly restored after the restoration sequence

The above pointers are implemented in SVA and is captured below. 
The below module gives only the skeleton implementation, Design engineer or verification engineer should enhance this according to their requirements. 
module PSO_strategy_assertions();
  
 //Skeleton SVA
  // Power Domain A outputs
  wire Block_A_out1;
  wire Block_A_out2;
  
  //Retention register
  reg Block_A_fsm_state;
  
  //PSO Sequence control signals
  reg power_controller_clk;
  reg iso_ctrl;
  reg ret_ctrl;
  reg shut_off_ctrl;
  reg rst_n;
  reg clk_gate_ctrl;
  
  //ISOLATION STRATEGY SVA
  //ISOLATION CHECK FOR OUTPUT STABILITY
  sequence ISO_CHECK1 ;
    $stable(Block_A_out1) throughout !iso_ctrl ;  
  endsequence
  sequence ISO_CHECK2 ;
    $stable(Block_A_out2) throughout !iso_ctrl ;  
  endsequence

  assert property (@(posedge power_controller_clk) ISO_CHECK1)
    $display("Block A out1 is isolated properly");
  else
    $display("FATAL ERROR: Block A out1 is not isolated properly");
      
  assert property (@(posedge power_controller_clk) ISO_CHECK2)
    $display("Block A out2 is isolated properly");
  else
    $display("FATAL ERROR: Block A out2 is not isolated properly");
      
     
  //ISOLATION STRATEGY CLAMP VALUE CHECKS    
  sequence ISO_VAL_CHECK1 ;
    (!iso_ctrl) and (!Block_A_out1);  
  endsequence
  
  sequence ISO_VAL_CHECK2 ;
    (!iso_ctrl) and (Block_A_out2);  
  endsequence
    

  assert property (@(posedge power_controller_clk) ISO_VAL_CHECK1)
    $display("Block_A_out1 is clamped as per isolation strategy");
  else
    $display("Mismatch between isolation clamp strategy and inferred strategy");
      
  assert property (@(posedge power_controller_clk) ISO_VAL_CHECK2)
    $display("Block_A_out1 is clamped as per isolation strategy");
  else
    $display("Mismatch between isolation clamp strategy and inferred strategy");


  //ISOLATION STRATEGY PURPOSE CHECK - whether it really  avoids 'x' at the boundary
  property X_identify_out1;
   ((!iso_ctrl) and (not $unknown(Block_A_out1)));  
  endproperty
  
  assert property(@(posedge power_controller_clk) X_identify_out1)
    $display("Block_A_out1 signal of PD boundary is clean");
  else
    $display("ERROR: Block_A_out1 signal of PD boundary is not clean");

  property X_identify_out2;
   ((!iso_ctrl) and (not $unknown(Block_A_out2)));  
  endproperty
  
  assert property(@(posedge power_controller_clk) X_identify_out2)
    $display("Block_A_out2 signal of PD boundary is clean");
  else
    $display("ERROR: Block_A_out2 signal of PD boundary is not clean");

  //RETENTION STRATEGY SVA
  property retention_check;
    int var1;
    @(posedge power_controller_clk) ($fell(ret_ctrl), var1 = Block_A_fsm_state) |-> 
                                    ##[1:$] (ret_ctrl && (Block_A_fsm_state == var1)) ;
  endproperty
  
  assert property (retention_check)
    $display("Data restored properly, Retention Strategy worked properly");
  else 
    $display("FATAL ERROR: Data restoration error");
  
  
endmodule

Note: Please feel free to correct me and share it in the comments section. We will evaluate and add update the blog.

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